Bachelor's degree in Electrical Engineering or related field, plus MSEE with 10+ years, BSEE with 12+ years, or equivalent relevant semiconductor design experience; SMTS candidates typically have 15+ years of experience with demonstrated technical leadership.
Extensive knowledge of CMOS circuit design, device physics, state machine logic, and design verification methodologies.
Experience with Verilog modeling, simulation tools, and power delivery network (PDN) analysis.
Proficiency in scripting languages such as Python, Tcl, or Perl.